منابع مشابه
Hardware/Software Co-Configuration for Multiprocessor SoPC
Real-time operating systems (RTOS) for multiprocessor systems built on a single FPGA should be configurable to a wide rage of architecture. Because the configuration of RTOS depends on hardware architecture, it is advantageous to co-configure multiprocessor architecture and RTOS simultaneously. This paper is a work-in-progress report of our research on configurable RTOS and co-configuration
متن کاملHardware-software Partitioning Algorithm Based on Binary Search Trees and Genetic Algorithm to Optimize Logic Area for Sopc
This paper presents an approach based on hardware/software partitioning to minimize the logic area of System on a Programmable Chip (SOPC) while respecting a time constraint. Our contribution focuses on introducing a new hardware/software partitioning algorithm. This algorithm is based on the principle of Binary Search Trees (BST) and genetic algorithms. It aims to define the tasks that will ru...
متن کاملArithmetic Coding Hardware Acceleration in a SoPC platform for Advanced Video Compression
This paper investigates the algorithmic complexity of arithmetic coding in the new H264 video coding standard and proposes a coprocessor to reduce it by more than an order of magnitude. The coprocessor is based on an innovative algorithm known as the MZ-coder and maintains the original coding efficiency with a multiplication-free, non-stalling, fully pipelined architecture with modest hardware ...
متن کاملCoquet: A Coq Library for Verifying Hardware
We propose a new library to model and verify hardware circuits in the Coq proof assistant. This library allows one to easily build circuits by following the usual pen-and-paper diagrams. We define a deep-embedding: we use a (dependently typed) data-type that models the architecture of circuits, and a meaning function. We propose tactics that ease the reasoning about the behavior of the circuits...
متن کاملSystolic Array Library for Hardware Genetic Algorithms
Genetic Algorithms (GAs) are commonly used search algorithms and there is an incentive in accelerate their execution speed using hardware. We present a collection of systolic array designs which perform the Selection, Crossover and Mutation operations of the GA. Although the premise there is considerable generality in the genetic operators is true, it is accepted that GAs often use di erent tec...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Radio Electronics, Computer Science, Control
سال: 2011
ISSN: 2313-688X,1607-3274
DOI: 10.15588/1607-3274-2011-1-21